Function Acceleration on FPGA with Vitis-Part 1: Fundamental

Function Acceleration on FPGA with Vitis-Part 1: Fundamental

This course is an introduction to function acceleration in high-level synthesis (HLS). The goals of the course are describing, debugging and implementing compute-intensive algorithms on FPGA-based embedded systems using C/C++ language without any help from HDLs (e.g., VHDL or Verilog).

The course introduces the Xilinx Zynq embedded systems and then explains how to use Xilinx toolsets to map applications on them.

It uses the Xilinx Vitis unified software platform to describe real examples and applications for embedded systems. The course follows the software and hardware emulation schemes as well as running the applications on the actual FPGAs.

Each section of the course uses several examples, quizzes and exercises to explain complex designing concepts easily and smoothly.

Along the course, you will work with several examples describing the HLS concepts and techniques. The course contains numerous quizzes and exercises for you to practice and master the proposed methods and approaches. In addition, the course utilises two exciting projects to put all the explained concepts together to design real circuits and hardware controllers.

This course is the first of a series of courses on function acceleration on Zynq-based embedded systems. Whereas this course focuses on fundamental concepts, the other courses will explain different optimisation techniques in Vitis.

Embedded System Accelerators with Vitis and HLS

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What you will learn

• Understanding the basic concepts of FPGA-Based embedded systems
• Understanding the Xilinx Zynq 7000 SoC and Zynq UltraScale+ MPSoC architectures
• Accelerating functions in the Xilinx Vitis unified software platform

Rating: 4.27273

Level: Beginner Level

Duration: 9.5 hours

Instructor: Mohammad Hosseinbady